Reversible Logic Synthesis Benchmarks Page
you are in... Main\Machine-Readable
The machine-readable format is a .tfc
which consists of the following strings.
1st string is the list of all variables (lines)
in the calculation; all entities are deliminated by commas. This string
starts with the keyword ".v ".
2nd string is the ordered list of all input variables
for the function to be calculated with the entities deliminated by
The beginning of this list is labeled with ".i ".
3rd string is the list of output lines separated by commas;
it starts with the control sequence ".o ". Optional string starting
quantifier ".ol" defines the labels for the outputs in the order they
in the output list. If output labels are not specified, the program
assign the input labels to the corresponding output.
4th string contains values for the input constants in the
they appear on the first string without any spaces. If no input
are needed, this string is not present. This string starts with ".c ".
5th string, and every non-empty string thereafter, contain
a) the word "BEGIN" indicating the beginning of a network, b) exactly
gate written in the form described below c) the word "END" indicating
end of the circuit. The file should list the gates in the order they
in the actual design.
The circuit file may also include comments, indicated by a "#" symbol
the beginning of a string.
NOT gate is a TOF(Ø;a) gate which in machine-readable format
be written as "t1 a".
CNOT gate is a TOF(a;b) gate which in machine-readable format should be
written as "t2 a,b".
Original Toffoli gate is a TOF(a,b;c) gate which in machine-readable
should be written as "t3 a,b,c".
SWAP gate is a FRE(Ø;a,b) gate which in machine-readable format
looks as "f2 a,b".
Original Fredkin gate is a FRE(a;b,c) which in machine-readable format
looks as "f3 a,b,c".
Toffoli gates are written as "tn ", where "t" indicates
and "n" is the size of the Toffoli gate (number of variables in it)
by the list of variables, such that the EXORed variable (target of the
gate) is at the end of the list.
Fredkin gates are written as "fn ", where "f" indicates
and "n" is the size of the corresponding Fredkin gate followed by the
of variables, such that the SWAPed variables (targets of the gate) are
at the end of the list.
Example. A reversible circuit file for 3-bit adder is as