Jon C. Muzio

                       Professor - Computer Science

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Journal and Conference 

119         K. Cattell, S. Zhang, M. Serra & J. C. Muzio, 2-by-n Linear Hybrid Cellular Automata with Regular Configurations, IEEE Trans. Computers, Vol. 48, pp. 285 - 295, 1999.

 

118         M. Serra, E. Wang & J. C. Muzio, A Multimedia Virtual Lab for Digital Logic Design,  Proc. 1999 International Conference on Microelectronic Systems Education, pp. 39 – 40, 1999. 

 

117         E. Dubrova, D.M. Miller & J. C. Muzio, A Heuristic Algorithm for AND-OR-XOR Minimization

                Proc. 4th International Workshop on the Applications of Reed-Muller Expansions in Circuit Design,

                pp. 37 – 54, 1999. 

 

116         J. Rice, M.. Serra & J. C. Muzio, The Use of Autocorrelation Coefficients for Variable Ordering for ROBDDs, Proc. 4th International Workshop on the Applications of Reed-Muller Expansions in Circuit Design, pp. 185 - 196, 1999. 

 

115         K. Cattell & J. C. Muzio, An Explicit Similarity Transform between Cellular Automata and LFSR Matrices, J. of Finite Fields and their Applications, Vol. 14, pp. 239 - 251, 1998.

 

114         E. V. Dubrova & J. C. Muzio, The Spectrality Decision Problem, J. of Approximation Theory and Applications,Vol. 14, pp. 73 - 84, 1998.

 

113         K. Cattell & J. C. Muzio, Partial Symmetry in  Cellular Automata Rule Vectors, J. of Electronic

                Testing, Theory and Applications, Vol. 11, pp. 187 - 190, 1997.

 

112         E. Dubrova, D.M. Miller & J. C. Muzio, On the Best ROBDD Variable Ordering for Functions with Disjunctive Decompositions, Elec. Letters, Vol. 33, pp. 239 - 251, 1997. 

 

111         K. Cattell & J. C. Muzio, The Synthesis of One-Dimensional Linear Hybrid Cellular Automata, IEEE  Trans. Computer-Aided Design of Int. Circs. and Sys, Vol.15, pp. 325 - 335, 1996.

 

110         D. Wessels & J. C. Muzio,  The Dangers of Simplistic Delay Models, J. of Electronic Testing, Theory

                and Applications, Vol. 8, pp. 61 - 70, 1996.

 

109         S. Zhang,  D. M. Miller & J. C. Muzio, Notes on Complexity of the Lookup Table Minimization

               Problem for FPGA Technology Mapping',  IEEE Trans. Computer-Aided Design of Int. Circs. and Sys,

                Vol.15, pp. 1588 - 90, 1996.

 

108         K. Cattell & J. C. Muzio, The Analysis of One-Dimensional Linear Hybrid Cellular Automata over

                GF(q),  IEEE Trans. on Computers, Vol. 45, pp. 782 - 792,1996.

 

107         E. V. Dubrova & J. C. Muzio, Generalized Reed-Muller Canonical Form for a Multiple-Valued

                Algebra, Multiple-Valued Logic, An International Journal, Vol. 1, pp. 104 -109, 1996.

 

106         E. V. Dubrova & J. C. Muzio, Testability of Generalized Multiple-Valued Reed-Muller Circuits,

                Proc. 26th Int. Symp. on Multiple Valued Logic, pp. 56 - 61, May 1996 (IEEE Conference).

 

105         S. Zhang,  R. Byrne, J. C. Muzio & D. M. Miller, Quantitative Analysis for Linear Hybrid Cellular Automata and LFSR as Built-In Self-Test Generators for Sequential Faults,  J. of Electronic Testing: Theory and Applications, Vol. 7, pp. 209 - 221, 1995 .

 

104         E. Dubrova, D.M. Miller & J. C. Muzio, Upper Bounds on the Number of Products in the

                AND/OR/XOR Expansion of Logic Functions, Elec. Letters, Vol. 31, pp. 541 - 542, 1995. 

 

103         X. Sun, E. Kontopidi, M. Serra & J. C. Muzio, The Concatenation and Partitioning of Linear Finite

               State Machines,  Int. J. Electronics, Vol. 78, pp. 809 - 839, 1995.

 

102         S. Zhang & J. C. Muzio, Evaluating the Safety of Self-Checking Circuits, J. of Electronic Testing:

                Theory and Applications, Vol. 6, pp. 243 - 253, 1995.

 

101         D. Wessels & J.C. Muzio, Analyzing and Improving Delay Defect Tolerance in Pipelined

                Combinational Circuits,  1995 IEEE International Workshop on Defect and Fault Tolerance in VLSI

                 Systems, 1995.

 

100         D. Wessels & J.C. Muzio, Timing Optimisation through Pipelining and Limited Gate Resizing,  1995

               ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems,

               1995.

 

99         H. ElGebaly, A. Sabaa, J. C. Muzio & F. ElGuibaly, Performance Evaluation of a Window Base

                Approach for ATM Cell Scheduling,  1995 Can. Conf. on Elec. & Comp. Engrr., Montréal, 1995.

 

98         A. Sabaa, H. ElGebaly, F. ElGuibaly  & J. C. Muzio , Implementation of a Window Based Scheduler in

                an ATM Switch,  1995 Can. Conf. on Elec. & Comp. Engrr., Montréal, 1995.

 

97         S. Zhang,  D. M. Miller & J. C. Muzio,  Quantitative Measures of Pseudorandom BIST Generators and

                the Improvement of Delay Fault Coverage,  1st IEEE International On-Line Testing Workshop, 1995.

 

96           H. ElGebaly, J. C. Muzio & F. ElGuibaly, Input Smoothing with Buffering: A New Technique for

                Queuing in Fast Packet Switching,  Proc. IEEE Pac. Rim Conf. on Comm., Comp., & Sign. Processing,

                 pp. 59 - 62,  1995 (abstract refereed).

 

95           E. Dubrova, D. Gurov & J. C. Muzio, The Evaluation of Full Sensitivity for Test Generation in MVL Circuits, Proc. 25th Int. Symp. on Multiple Valued Logic, pp. 104 - 109, 1995 (IEEE Conference).

 

94           H. ElGebaly, J. C. Muzio & F. ElGuibaly, On Concurrent Error Detection of Finite State Machine

                Based Systems,  Proc. IEEE Midwest Symposium on Circuits and Systems, pp. 213 - 216, 1994.

 

93           S. Zhang,  R. Byrne, J. C. Muzio & D. M. Miller, Why Cellular Automata are better than LFSRs as

               Built-In Self-Test Generators for Sequential-type Faults, Proc. IEEE Int. Symp. on Circuits & Systems

               94, pp. 69 - 72, 1994 .

 

92           E. Dubrova, D. Gurov & J. C. Muzio, Full Sensitivity and Test Generation for Multiple-Valued Logic Circuits, Proc. of 24th Int. Symp. on Multiple Valued Logic, pp. 284 - 288, 1994,  (IEEE Conference).

 

91           X. Luo & J. C. Muzio, A Fault-Tolerant Multiprocessor Cache Memory,  . Proc. IEEE International Workshop on Memory Techniques, Design and Testing, pp. 52 - 57, 1994.

 

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